Home > Electronic Tutorials > Sequential Logic > The SIPO Shift Register Tutorial

Sequential Logic - Electronic Tutorials

The SIPO Shift Register Tutorial

SIPO Shift Register Block Diagram

Data is fed into the SERIAL IN/PARALLEL OUT shift register bit by bit, in the same way as for the SISO shift register.

However the four bits are all shifted out simultaneously, in parallel, as one word,

Note: To report broken links or to submit your projects please send email to Webmaster