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Asynchronous Down Counters Tutorial

Asynchronous Down Counters Diagram

The flip-flop outputs change state on the positive going edges of the clock input pulses. Looking at the diagram below, at the start on the left, ABCD are all high, 1111, equivalent to decimal 15.

After clock pulse 1, A has gone low giving 1110, the equivalent of decimal 14. After clock pulse 2, the count is 1101, decimal 13. After 8 pulses the count is  0111, decimal 7. 15-8 = 7

After 15 pulses the count will be 0000.

On the next pulse the counter will indicate 1111.

Asynchronous Down Counters Diagram

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