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Clocked D Type Flip-Flop Tutorial

Clocked D Type Flip-Flop Diagram

The D type flip-flop has only one input (D for Data) apart from the clock.

The INDETERMINATE state is avoided with this flip-flop.

When the clock goes high, D (a 0 or a 1) is transferred to Q.

When the clock goes low, Q remains unchanged.

Q stores the data until the clock goes high again, when new data may be available.

At A, clock and data are high.

Q goes high and stays high until B.

At B, clock is high and data is low.

Q goes low and stays low until C.

At C, clock and data are both high.

Q goes high and stays high until E.

Q does not change during clock pulse D, because clock and data are still both high.

At E, data is low, so Q goes low.

At F, data is high so Q goes high.

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