As already mentioned, the original 8052 ran at a rate of one instruction cycle every 12 oscillator cycles--the DS80C320, however, operates at a rate of one instruction cycle every 4 oscillator cycles. Since the timers in an 8052 are incremented once per instruction cycle this would cause the 80C320 timers to run 3 times as fast. This would render the chip incompatible with software that was designed with the 8052 in mind. Delays would be 1/3rd as long and baud rates would be 3 times as high.
To remedy this problem, the DS80C320 allows the software to independently configure each of the three timers for 4-cycle or 12-cycle operation. By default, all timers operate on the standard 12-cycle approach. However, software may modify a new SFR in order to use timers in 4-cycle mode. This allows more precision in timing as well as makes higher baud rates possible.
The timer cycle-modes are controlled by the CKCON SFR at 8Eh.
