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Electronics Schematics - S

Sample and Hold Circuits

Calibrate scope jitter using a transmission line loop: 09/20/2001 EDN - Design Ideas / Digital-clock-period jitter is the variation in the period of a clock cycle compared with a nominal (average of many cycles) clock period.

Circuit improves on temperature measurement: 05/02/2002  EDN - Design Ideas / When current pulses with a stable IHIGH/ILOW ratio modulate a semiconductor junction, the ensuing voltage difference (for example, ?VBE for a bipolar transistor) is a linear function of the absolute (Kelvin) temperature, T. You can use this truism to make accurate temperature measurements.

Infinite Hold Circuit Zeros Out Long Term Drift: 03/03/94 EDN-Design Ideas

Low Voltage Rail to Rail Sample & Hold:

NCO technique helps µC produce clean analog signals: 04/15/99 EDN-Design Ideas / NCO technique helps C produce clean analog signals. C generates musical sounds. Continuity buzzer is frugal with power. Stereo jack adds no-cost power/logic control.

Precision T / H Amplifier uses 3.3 Volt Supply: 06/22/95 EDN-Design Ideas

RF transmitter uses AMI encoding: 11/24/99 EDN-Design Ideas / Although alternate-mark-inversion (AMI) encoding is well-suited for direct-conversion FM transmission, designers often overlook the technique. AMI, a three-phase, synchronous-encoding technique, uses bipolar pulses to represent logic ones and no signal.

Sampling peak detector has shutdown feature: 05/16/2002  EDN - Design Ideas / You face a serious problem in using a slow ADC with a fast peak detector. The circuit in Figure 1 allows a slow ADC to measure a fast, sampled signal peak. The 100-MHz peak detector for ultrasonic-pulse sampling uses a fast MAX4231 amplifier from Maxim (www.maxim-ic.com). This amplifier has a shutdown feature that facilitates power savings without losing the sampled information.


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