Electronic Circuits and Tutorials
Tutorials
Dictionaries
Projects
Facebook
Discover
Electronic Schematics - D

Time Delay Circuits

Butterworth filter has adjustable group delay -  8-Aug-02 Issue of EDN  The Sallen-Key realization of a 5.25-MHz, three-pole Butterworth filter has a gain of 2V/V and can drive 75Ω back-terminated coax with an overall gain of 1 (Figure 1]. Used to reconstruct component-video (Y, Pb, Pr]..... [Design Idea by William Stutz, Maxim Integrated Products, Sunnyvale, CA]

Delay Line Aids in One-shot Simulations -  02/05/04 EDN-Design Ideas.....In low-noise analog circuits, a high-gain amplifier serves at the input to increase the SNR. The input signal level determines the input-stage gain; low-level signals require the highest gain. It is also standard practice in low-noise....EDN is migrating links. This link is not verified.  Google the "title" EDN for new link.

Delay Line Eases SPICE Dead Time Generation -  03/02/00 EDN-Design Ideas.....Generating complementary clock signals in a Spice simulation is an easy task. However, this task gets much harder if you need to introduce some dead time. EDN is migrating links. This link is not verified.  Google the "title" EDN for new link.

Delay line has wide duty-cycle range -  27-Jun-02 Issue of EDN  Today's digital delay lines can process pulses no shorter than their delay times, and that restriction confines the devices to applications in which the duty cycle remains near 50%. A limited range of available delays (2 to 100 nsec per tap] further limits their use. Longer delay is available with one-shot multivibrators of standard digital-logic families, but those devices do not retain duty-c..... [Design Idea by John Guy, Maxim Integrated Products, Sunnyvale, CA]

Delay Line Implements Clock Doubler -  07/18/96 EDN-Design Ideas..... EDN is migrating links. This link is not verified.  Search the "title" + "EDN" for new link.

Delay line upgrades vintage scope -  18-Apr-02 Issue of EDN  Vintage triggered-sweep oscilloscopes find use in many applications. However, they have no internal delay line, so they can't display the pulse that triggers the sweep. Moreover, early laboratory scopes contain delay lines having insufficient delay to display such pulses during a uniform portion of the sweep..... [Design Idea by Robert Houtman, Blaine, WA]

Delay Simulator Debugs Communications Equipment -  10/27/94 EDN-Design Ideas..... Phone calls over satellite circuits experience a ¼-sec transmission delay in each direction. The low-cost circuit (around $20]in Fig 1a simulates this delay and provides hooks for inserting noise, echo, and other..... EDN is migrating links. This link is not verified.  Search the "title" + "EDN" for new link.

Delayed DC Power -  This circuit Creates a Tiny Power Delay to a Circuit. Read Why I designed it.

Delayed Interface to Kodak DC-20 Camera -  designed by Jon Fick

Delayed Off Light Switch#REF!

Delayed Shutter Control for Kodak DC-20

Dome light dimmer (with delay) -  For all you guys out there that want a fading dome light (aka courtesy light aka theatre lighting) without having to pay for one, you can build your own. I have attached the schematics and you can build it for a few bucks given that you don't have any spare components lying around otherwise it can cost you absolutely nothing. Of course you can rip some parts from your TV, CD player, radio, etc., but I'm not responsible for the damage you cause this way [b:e43bc460fa]The way it works[/b:e43bc460fa] I won't bother you with technical....

Feedback circuit eliminates CCD-driver delay mismatch -  18-Sep-03 Issue of EDN  In a CCD (charge-coupled device], packets of charges shift across the array. The transistor array, also called a bucket-brigade shift register, receives drive from a dual-phase clock signal. Dual-phase clock signals comprise two synchronized clock signals that are 180° out of phase. High peak-output-current CCD drivers can buffer the logic-level clock signals and turn them into high-voltag..... [Design Idea by Mike Wong, Intersil-Elantec, Milpitas, CA]

Generating a Delayed Pulse With a dual 555 Timer -  The circuit below illustrates generating a single positive pulse which is delayed relative to the trigger input time. The circuit is similar to the one above but employs two stages so that both the pulse width and delay can be controlled. When the button is depressed, the output of the first.

Generating Long Time Delays -  Generating long delays of several hours can be accomplished by using a low frequency oscillator and a binary counter as shown below. A single Schmitt Trigger inverter stage (1/6 of 74HC14) is used as a square wave oscillator to produce a low frequency of about 0.5 Hertz. The 10K resistor in series with the input (pin 1) reduces the capacitor discharge current through.

Group Delay Equalizer has Gain More Than One -  10/12/95 EDN-Design Ideas EDN is migrating links. This link is not verified.  Search the "title" + "EDN" for new link.

High & Low Voltage Cut Off With Time Delay -  The power line fluctuations and cut-offs cause damages to electrical appliances connected to the line. It is more serious in the case of domestic appliances like fridge and air conditioners. If a fridge is operated on low voltage, excessive current flows through the motor, which heats up, and get damaged.


NoteTo report broken links or to submit your projects, tutorials please email to Webmaster