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Additional Features in 8052

8052 Microcontroller Tutorial
Timer 2 Interrupt

Author: Craig Steiner

Book: The 8051/8052 Microcontroller:
         Architecture, Assembly Language, And Hardware Interfacing (Paperback)

TIMER 2 INTERRUPT

As is the case with the other two timers, timer 2 can be configured to trigger and interrupt. In fact, the text above indicates a number of situations that can trigger a timer 2 interrupt.

To enable Timer 2 interrupt, set ET2 (IE.5). This bit of IE is only valid on an 8052. Similarly, the priority of Timer 2 interrupt can be configured using PT2 (IP.5). As always, be sure to also set EA (IE.7) when enabling any interrupt.

Once Timer 2 interrupt has been enabled, a Timer 2 interrupt will be triggered whenever TF2 (T2CON.7) or EXF2 (T2CON.6) are set. The Timer 2 Interrupt routine must be placed at 002Bh in code memory.

NOTE: Like the Serial Interrupt, Timer 2 interrupt does not clear the interrupt flag that triggered the interrupt. Since there are two conditions that can trigger a Timer 2 interrupt, either TF2 or EXF2 being set, the microcontroller leaves the flags alone so that your interrupt routine can determine the source of the interrupt and act accordingly. It is possible (and even probable!) that you will want to do one thing when the timer overflows and something completely different when a capture or reload is triggered by an external event. Thus, be sure to always clear TF2 and EXF2 in your Timer 2 Interrupt. Failing to do so will cause the interrupt to be triggered repeatedly until the bits are cleared.

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